Semiconductor devices having a layer of semiconductor material disposed on an insulating substrate are generally known in the art. An example of such a device is a silicon-on-insulator (SOI) semiconductor device which includes a silicon island formed On the surface of an insulating material. When the insulating material is a sapphire substrate, the structure is known as a silicon-on-sapphire (SOS) semiconductor device. Metal-oxide-semiconductor (MOS) transistors or other active devices are formed in and on the silicon island. MOS/SOI transistors generally have higher speed and improved radiation hardness in comparison with MOS transistors formed in bulk silicon.
MOS/SOI transistors are conventionally fabricated by first forming an island of semiconductor material, such as single-crystalline silicon, on the surface of an insulating substrate, such as sapphire. The silicon island is generally doped to have a first conductivity type. A gate oxide layer and a gate electrode are then formed on the island. Source and drain regions of a second conductivity type ae formed in the silicon island using conventional ion implantation techniques. During the implantation step, the gate electrode acts as a masking layer so that self-aligned source and drain regions are formed in the silicon island. Then, the device is completed using conventional MOS processing techniques.
MOS/SOI transistors have a higher degree of radiation hardness with respect to transient-type radiations (gamma pulses, x-ray pulses and high-energy single particles) because, when compared to bulk silicon devices, there is a smaller volume of silicon present in which photocurrent generation can occur. However, these devices often suffer from back-channel leakage. The back-channel leakage problem can best be illustrated by viewing FIG. 1. In FIG. 1, an N-channel SOS transistor 10 is shown having a sapphire substrate 12 and a silicon island 14. The silicon island 14 contains N-type source and drain regions 16 and 20, respectively, separated by a P-type region 18. A gate oxide layer 22 and a gate electrode 24 are disposed over the silicon island 14. When this device is exposed to any type of high-energy radiation, radiation induced positive charges 26 accumulate in the sapphire substrate 12 in the region adjacent the silicon island/sapphire substrate interface. The positive charges 26 attract corresponding negative charges 28 in the P-type region 18 of the silicon island 14. This accumulation of negative charges 28 creates a back-channel or electron flow between the source region 16 and the drain region 20 which is not controlled by the gate electrode 24.
Numerous solutions have been proposed to reduce back-channel leakage currents. For example, P. Vasudev in U.S. Pat. No. 4,509,990, entitled "Solid Phase Epitaxy And Regrowth Process With Controlled Defect Density Profiling For Heteroepitaxial Semiconductor On Insulator Composite Substrates," issued Apr. 9, 1985, discloses the use of a high defect density layer within the silicon island. This high defect density layer, which may be a residual damaged interface layer or an annealed interface layer, is formed during the ion implantation step used in the solid-phase epitaxy growth process. The high defect density layer is positioned in the silicon island adjacent to the silicon/sapphire interface. This high defect density layer reduces the leakage currents along the back-channel because the damaged crystal structure reduces the mobility of the charge carriers along this region.
Back-channel leakage currents can also be reduced by selectively doping portions of the silicon island. U.S. Pat. No. 4,183,134, entitled "High Yield Processing For Silicon-On-Sapphire CMOS Integrated Circuits," issued Jan. 15, 1980, to H. Oehler et al. is an example of such a process. In N-channel devices, P-type materials are implanted into the back-channel region adjacent the silicon/sapphire interface. This region near the silicon/sapphire interface has a heavier P-type doping concentration so as to increase the amount of radiation-induced positive charge within the sapphire substrate needed before the back-channel in the silicon island is turned on.
Because of the large density of defects in the single-crystalline silicon material near the interface with the insulating substrate, it is difficult to heavily dope the back-channel region such that the implanted ions are electrically active. The silicon grain boundaries near the silicon island/insulating substrate interface also render many of the implanted P-type dopant ions electrically inactive. Also, if the straggle of the implanted P-type ions becomes too large, the threshold voltage of the N-channel transistor may be affected by the back-channel doping step. Therefore, new techniques are needed for suppressing radiation induced back-channel leakage currents.